The way microwave circuits, patterned metal traces on various microwave substrates, have commercially been packaged for over 30 years utilizing test fixtures and metal housings have to large extend remained the same. Conventional electronic packaging has served the purpose of protecting electronic circuitry in low frequency applications while the package itself is the main cause of degradation in microwave applications. Today, group IV circuits have reached ULSI era and group III-V ICs LSI/VLSI era. Early monolithic ICs brought about the requirement to package ICs in single chip packages while MCMs become common in early 1990's. Today packaging methods are very diversified and often the infrastructure is complex. Until recently, EMS providers or packaging foundries have packaged the ICs, while semiconductor industries have been providing the chips fabricated in clean rooms, where handling of PCBs is difficult. Feature sizes on PCBs have now become many orders of magnitude larger than feature sizes on chips. Thereby, conventional partitioning of electronic packaging has presented a clear conflict in further miniaturizition of HFICs that calls for improved interface between the micro- and macroworlds.
Traditionally common ground on HFIC chip had to be connected to the common ground of the substrate and metal housing through via holes, which tend to be large in size. Advancement in manufacturing technologies has reduced series inductance of via holes. Ideally one wants to connect the common ground on chip directly to the common ground of the assembly without via holes. However, this ideal option has not been presented in the market. Also, typically common ground of HFICs and low frequency ICs has been defined at different potential, making the integration of various ICs in one assembly more difficult.
High frequency integrated circuit (HFIC) packaging has not yet reached the level where monolithic microwave ICs (MMICs) together with low and medium frequency ICs are integrated in a true 3D manner. Drayton et. al., U.S. Pat. No. 5,913,134, Jun. 15, 1999, discuss how passive MICs are created using Si micromachining. These types of circuits can easily be created by using isotropic silicon wet etching, e.g., KOH, 90 degree angle is not maintained and is clearly indicated by drawings. Drayton et. al. work is not suitable for integration of HFICs due to the fact that ICs typically have a large number of points of contacts and thus the substrate structure must become as compact as possible which is not attainable by Si wet etching. In HFICs, HF-signal is typically taken out from the chip differentially. In addition to ground and transmission lines one has to provide power and additionally, e.g., distribution of control signals, divided power and ground planes. Thus, a new type of HFIC microsystems assembly must represent is a clear extension to the formation of HFIC circuitry on chip. Typical MIC layouts are inherently simple in structure while highly integrated compact MMICs have complex structures. Thereby, Drayton's approach is not applicable. Lacking third signal plane and tightly held, large number of IC pads makes Drayton's approach void in this invention. Problems specifically related to HFIC assembly and generic technology in this field is discussed in the following publication: “High Frequency MultiChip Modules—Materials, Design and Fabrication Techniques”, Tarja A. Juhola, Royal Institute of Technology, May 2000, ISRN KTH/MVT/FR-00/1-SE, ISSN 0348-4467, TRITA-MVT Report 2000:1.